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The 3 jumpers to the right of the clock generator controls the FSB. Otherwise, yep I could sneak a trimpot in there somewhere too. I’ll have to take a look at modbin, wli would certainly be useful to have some control over parity since most of my DRAM modules are bit.
This board isn’t as popular as the LS there’s barely any information available.
I’d rather not tear the sticker off to find out I’m a stickler for detailsbut I suppose I could drop the chip into to one of my device programmers and see if they can identify the chip using the device ID bits. Last edited 1m487 FesterBlatz on This site hosts no abandonware.
If I remember correctly. Ideally, I would like to run a more thorough comparison and update this thread, viewtopic. I’m looking forward to your test results of EDO vs. Dual Xeon X 4. Aoi enough the memory benchmarks dropped by a pretty noticeable amount, so it does seem like the ALi chipset will indeed leverage EDO RAM when available and unlike SIS, provides a tangible improvement in performance. If you don’t want to remove the sticker, you can usually tell if it is UV EPROM by noticing the thickness of the chip and the sandwich look to it.
When I get some time tonight I’ll look closer and see if I can figure out which jumpers are for the multipliers. I didn’t have time to save the results, but I hope to get back to it tomorrow since I’ll have the house to myself for most of the day. Does anyone familiar with either of these boards sli any comments or suggestions on any particular settings I may need to adjust on either board that may account for such a dramatic difference? The more I learn, the more I realize how much I don’t know.
For reference, I’ve attached a manual and board layout if anyone wants to take a look. Return to General Old Hardware. Users browsing this forum: I did not bother to check mine with EDO. I’d use a trimmer rather than a fixed resistor if you’re testing for an IBM 5x Since I’d likely never need to use the 4V option, I could always replace the relevant divider resistor to change the 4V selection to 3.
The Mother Board
Perhaps RAM write to 1 ws. And stick with K cache.
I’d be happy run some time demos. Then I put sticks fromm and in the machine assuming that they are FPM memory but I’m getting the same results as before. When looking at the manual, do you see what I mean about lack of any detail regarding multipliers?
This disclaimer is brought to you thanks to the BSA. Based on the 33MHz results there appears to be some real potential here!
PC Chipsets documentation: ALi
Has anyone else experienced this? The one above to the left of the clock generator controls the PCI divider. There is no material that is knowingly illegal here.
You do not have the required permissions to view the files attached to this post. I had K of cache installed, which can sometimes influence what fastest cache timings are stable. This really limits its usefullness with an Am5x or Cyrix 5x The LSe manual I have doesn’t explain what the individual CPU selection jumpers are, only where to put them for a particular processor.