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Discussion in ‘ General Electronics Chat ‘ started by semi12May 14, May 14, 1. May 14, 3 0.
I’m not sure why it doesn’t? I’ve been trying to find the spec on minimum input pulse width but no luck so far.
How to trigger 74LS123?
May 14, dstasheet. Apr 20, 15, Are you sure the pulse meets the TTL logic level requirement? May 14, 3. Apr 26, 3, 1, Read through this thread http: May 14, 4.
I’m pretty sure the input pulse is TTL-compatible, because I’m using a function generator to supply the input pulse. For example, at 1us it works fine. Attached is the schematic.
May 14, 5. Jan 28, 9, It will not solve your minimum input pulse width problem but it will make the output pulse width adjustment better. May 14, 6.
Which test results that lead you to believe it’s not working as you designed? I mean, within a few nanoseconds after the input pulse, did Q go high or did it remain low? Can you post the pic of your oscilloscope presentation? What model oscilloscope are you using to assist you with your troubleshooting?
Your delayed output seems abnormally long.
using 74LS | All About Circuits
Do you need that type of a delay? What is your variable resistor set at?
May 14, 7. Jan 23, 1. In pdf spec at the link below, under general operating conditions, it specifies a pulse duration of 40 nanseconds.
Full text of “IC Datasheet: 74LS”
I’m not sure if this refers to the input pulse. May 15, 8. The problem only happens when I start decreasing the input pulse width. The output pulse simply disappears the chip no longer reacts to the trigger pulse. May 15, 9. Apr 27, 1, It is even faster than the 74LS family. Using exception Posted by mentaaal in forum: You May Datasheft Like: Here are the details.
STMicroelectronics is getting in on that.
74LS123 Datasheet PDF
Tales of Project Troubleshooting: Solutions from a Problem-Magnet This article covers the various roadblocks encountered in a new design and how they were troubleshot and overcome. Your name or email address: Do you already have an account?
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